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Note: This program is subject to change without notice. Final printed version of program will be available at the conference.

Tutorial (April 06)

08:00 Registration
09:00 Welcome - Tutorial Chair: Dr Francesco Driussi, Università di Udine, DPIA, Italy
09:10 Prof Yoshio Mita: “L'essentiel est invisible” - Fundamentals of Microelectronic Test Structure

Abstract:

“L'essentiel est invisible pour les yeux” is a phrase of “Le Petit Prince” of Antoine de Saint-Exupery. The direct translation is “The essential is invisible for the eyes”. Also in microelectronics, the essential values are often invisible. In contrast to what was said in the story: “Men can see only with heart'”, microelectronic engineers can see essential parameters by means of test structures associated with test methods. Since 1980s, the semiconductor experts continuously proposed such Test Structures, especially through the IEEE ICMTS conference. The technological field now covers from critical dimension, process parameter, device parameter, modeling, and to reliability. The application field is now expanding from silicon semiconductor to microelectromechanical fields. This tutorial addresses from beginner to experts to share the principle and past significant contributions on Microelectronic Test Structures. The presenter puts his all effort to attract the audience for better understanding of the Test Structures, on behalf of the 1st awardee of UTokyo Faculty of Engineering Best Teaching Award.

Biography:

Yoshio Mita received his Bachelor, Master, and Ph.D degrees of Electrical Engineering from the University of Tokyo in 1995, 1997 and 2000, respectively. He is an associate professor of Department of Electrical and Electronics Engineering. His current research interests include VLSI integrated MEMS, nanostructure and nano electrical devices by MEMS semiconductor technology. He published over 192 journal papers and reviewed conferences, and over 100 domestic conferences. In parallel, Dr. Mita is managing an open micro and nano fabrication platform of the UTokyo since 2003, where over 700 researchers from 365 independent research groups are exploring future micro electro mechanical systems. Since 2004 he is a member of the technical committee of the IEEE International Conference of Microelectronic Test Structures (ICMTS), and he served as a general chairman of the ICMTS 2019 KitaKyushu, technical chairman of the ICMTS 2007 Tokyo and 2016 Yokohama, tutorial chairman of the ICMTS 2010 Hiroshima, and steering committee member since 2017.
10:05 Coffee Break
10:35 Dr Hans Tuinhout: High-precision measurement techniques and robust statistical data analysis for matching and variability characterization

Abstract:

Biography:

Hans Tuinhout received an Ir. degree in EE and a Ph.D degree from Delft University of Technology in the Netherlands in 1980 and 2005 respectively. Since 1980 he worked for Philips Research and now NXP Semiconductors on electrical process and device characterization for CMOS and BiCMOS integrated circuit technologies. Over the past 28 years his work focused on characterizing and understanding parametric variability and low-frequency noise effects in contemporary mixed-signal IC technologies. Hans Tuinhout has authored and co-authored over 50 papers at conferences and in journals and has actively been involved with the ICMTS since 1988.
11:30 Short Break
11:35 Dr Suzanne Costello: Advanced Materials Analysis for Reliability of Systems in Package

Abstract:

Biography:

Following completion of her Masters degree in Physics and Engineering Doctorate in Microsystems Engineering at Heriot-Watt University (sponsored by MCS), Suzanne joined the MCS team in 2011 as a materials scientists specialising in electronics packaging. Over the course of the past 9 years, Suzanne has developed within the business through several technical roles and recently joined the leadership team whilst retaining a key scientific role as a packaging specialist. MCS Ltd. is a consultancy business providing industrial forensic science services based on materials science. We solve materials, manufacturing and reliability problems for customers around the world within tight commercial timeframes. Suzanne’s technical interests lie in reliability modelling supported by physical failure analysis, understanding new interconnect materials and defining how they respond in application. She has a keen interest in supporting the semiconductor, MEMS and microelectronics packaging community and was the first female Chair of IMAPS-UK.
12:30 Lunch
14:00 Prof Chadwin Young: Novel Materials for Future Device Applications

Abstract:

Biography:

Chadwin D. Young received his B.S. degree in Electrical Engineering from the Univ. of Texas at Austin in 1996 and his M.S. and Ph.D. in EE from the North Carolina State University in 1998 and 2004, respectively. In 2001, he joined SEMATECH where he completed his dissertation research on high-k gate stacks and continued this research at SEMATECH working up to Senior Member of the Technical Staff on electrical characterization and reliability methodologies for the evaluation of high-k gate stacks on current and future device architectures. He joined the Materials Science and Engineering and Electrical Engineering Departments in September 2012 where his research focus is on electrical characterization and reliability methodologies for the evaluation of future materials and devices. He is NSF CAREER Award recipient, and has authored or co-authored 315+ journal, conference and invited papers. He has served: on the management or technical program committees of IIRW, IRPS, SISC, IEDM, WoDiM, SNW; as Guest Editor for IEEE Transactions on Device and Materials Reliability; and as a peer reviewer for several journals. He is currently a Senior Member of IEEE and serves as a Device Reliability Physics Committee Member of the IEEE Electron Device Society.
14:55 Short Break
15:00 Dr Elisa Vianello: Resistive memories for neuromorphic hardware

Abstract:

Biography:

Dr. Elisa Vianello is a scientist of CEA-LETI (Laboratory of Electronics, Technology and Instrumentation of CEA, Grenoble). She joined CEA Leti in 2011 after spending one year as research staff at Fondazione Bruno Kessler, Trento, Italy working on the development of advanced Silicon Radiation Detectors. Vianello received her PhD. in Electrical Engineering from the Università degli Studi di Udine (Italy) and the Grenoble Institute of Technology (INPG, France) in 2010. Since 2018, she is LETI senior expert on non-volatile memories and neuromorphic computing hardware. She is coordinator of an H2020-ICT project (Memory technologies with multi-scale time constants for neuromorphic architectures). Her current research interests concern the development of new technologies for bio-inspired neuromorphic computing, with special focus on new resistive memory devices. She is author or co-author of more than 100 technical papers and four book chapters. She served in several Technical Subcommittees of internarial conferences, such as IEEE-International Reliability Physics Symposium (IRPS, 2013-2014), IEEE-International Electron Device Meeting (2016-2017), and the IEEE European Solid-State Device Research Conference (ESSDERC, 2016-present). She is guest editor of the ‘Emerging Materials in Neuromorphic Computing’ APL Material special issue.
15:55 Coffee Break
16:25 Dr Johan Klootwijk: CMUT: Capacitive micro-machined ultrasonic transducers

Abstract:

Capacitive micro-machined ultrasonic transducers (CMUT) are MEMS based structures that transmit and receive acoustic signals in the ultrasonic range. They enable breakthrough applications for ultrasound, complementing conventional piezo technology with advantages such as small form factor, large bandwidth, easy fabrication of large arrays, and integration with driver circuitry: CMUT-on-CMOS for 3D ultrasound. CMUT devices from Philips use the so-called collapse mode, with increased output pressure and sensitivity compared to devices in non-collapse mode. A DC voltage is used to collapse the top electrode on the bottom electrode. This CMUT technology is well suited and optimized for medical applications, ranging from general probes towards integration in catheters. By changing device architecture (dimensions, layer thickness, gap height, layer stress,..), one can tune the device for different applications. In this tutorial I would like to elaborate on the physics and (process) development of CMUTs, their potential applications (including some examples) and the use of test structures that have proven to also be very useful in CMUT development.

Biography:

Dr. Johan H. Klootwijk received his M.Sc. and Ph.D. degrees in electrical engineering from the University of Twente, Enschede, The Netherlands, in 1993 and 1997, respectively. In October 1997, he joined the Philips Research Laboratories, Eindhoven, The Netherlands. Johan’s research activities have included development and characterization of Si and SiGe bipolar transistors, non volatile memories (EEPROMs), SOI/SOA technologies, reliability of thin dielectrics, development of InP based HBTs wideband RF applications, development, characterization and integration of high-density 3D devices, in particular capacitors and all solid-state batteries, EUV spectral purity filters, new materials for direct conversion CT scanners, nanowire sensors, miniaturized GC and CMUT devices. Currently, he is responsible for technology and test structure development of several projects in the Micro Systems and Devices group in cooperation with the MEMS Foundry, where part of his work is on sensors, part of his work is leading a project on EUV membranes and part of his work is on leading a project that develops CMUT devices. Johan has authored or co-authored several scientific publications and conference contributions, holds several patents and he is a senior member of the IEEE. He has been a senior lecturer on semiconductor devices at the CTT from 1999 to 2008. He received the Best Paper Award for his contribution on the ESSDERC Conference in 2001 and a best poster award on the NATO-ASI summer course on ALD in 1995. For part of this work he received a Bronze Award for the ‘NXP Invention of the Year 2007’ and a Bronze invention award in 2015. He served as the Tutorial Chairman of the International Conference on Microelectronic Test Structures, ICMTS, 2002, 2008 and 2011 and as the Technical Chairman in 2014.
17:20 Closing Remarks
17:25 Welcome Reception
19:55 Closing