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Looking for the best opportunity to present and discuss your ideas and results about test structures, measurements, and characterization. Join the 35th ICMTS conference.


Abstracts may be up to four pages in PDF format (font must be embedded). The first page must contain:
  • a title
  • a 50-word summary
  • Author name(s)
  • Primary author's street address, email address, fax number
  • Preference for oral or poster session presentation, if any

The body of the abstract should consist of one page of text (800 to 1000 words) and up to two pages containing major figures and tables.

Please be sure that at least one of the authors is planning to attend the conference in order to present the paper, if accepted.

The submission deadline for abstracts is October 15, 2022
extended to November 15, 2022.

To submit your abstract in PDF format (with all fonts embedded!) please click this link.

The selection process will be based on the technical merit and will be highly weighted in favor of abstracts with high test structure content (including illustration) along with measurements and analysis.


Original papers are solicited presenting new developments in topics relevant to ICMTS, including but not limited to, test structures, measurements, and results, in the following areas:

  • Methodologies, Verification
  • Within-die circuits for process characterization/monitoring
  • Design enablement – Characterization and validation of digital and analog libraries
  • Devices and Circuit Modeling
Measurement techniques
  • DC, AC and RF measurements: setup, test and analysis
  • Reliability test - including thermal stability, failure analysis, prediction, etc.
  • Statistical analysis, variability, throughput increase, smart test strategies
  • Use of machine learning and AI in analysis of data sets - parameter extraction etc.
  • Wafer probing, within-die measurements, in-line metrology
  • Throughput, testing strategies, yield enhancement and process control tests
  • Emerging memory technologies (single cell, arrays, and application in neural networks)
  • Emerging transistor technologies for digital/analog/power applications
  • Photonic devices - silicon integration, new displays (OLED, ?-displays)
  • Flexible electronics and sensors (organic and inorganic materials)
  • M(N)EMS, actuators, sensors, PV cells and other emerging devices


ICMTS is the industry’s only conference that focuses on test structure design, measurement and usage. The single-session format allows for interaction with your fellow participants that’s not practical at larger conferences.

A Tutorial Short Course will precede the conference sessions. Several of the best measurement, equipment, design, and manufacturing experts, will participate to the equipment exhibition and presentations.

A Best Paper award will be presented by the Technical Program Committee. The IEEE Electron Devices Society is the co-sponsor, and all published papers will be submitted for possible inclusion on IEEE Xplore(R)


Since the year 2007, the ICMTS will be back to The University of Tokyo (we call UTokyo), Japan. Tokyo is one of the must-visit cities of Japan, with relatively young history since 17th century, and became the real (both political and economic) capital of Japan since 1868.
The miraculous development has been possible due to the inclusive society, with the firm educational system, heading from the University of Tokyo, the first national university of Japan established in 1877. Certain number of faculties such as Electrical Communication Engineering has established earlier than that : the year 1873, which is only five years after the Meiji revolution. The ECE (Now EE and ICE) department is known as the first Electrical Engineering faculty in the world (the others were mostly Physics department), under the guide of Professor William Ayrton (invited from the University of Glasgow). The venue is Takeda Sentanchi Building, operated by the decedents of Professor Ayrton. On the top floor, we have a 300-guests conference room, where the ICMTS will be held. On the basement, there is a Federal Class 1 Supercleanroom, where over 160 independent research groups are looking for the Next Generation MicroElectronic Devices. Visit tour will be possible upon request.